Omron CP1L-M60DT-D CP1L Series Programmable Logic Controller

Configured for high-speed logic processing, multi-axis positioning, and discrete sensor interfacing in industrial automation networks, the Omron CP1L-M60DT-D (CP1L-M60DT-D) CPU Unit provides direct physical/electrical execution.

Technical Identifier Matrix

Hardware Specifications

Omron Backplane Bus Velocity & Determinism Architecture

The Omron CP1L-M60DT-D CPU unit achieves an instruction execution benchmark of 0.55 us for basic ladder operations and 4.1 us for specialized instructions, operating with a deterministic common processing overhead of 0.4 ms. Internal I/O synchronization utilizes cyclic scanning combined with immediate refreshing to eliminate backplane communication latency across connected CP-series expansion units. The integrated task scheduler handles up to 32 cyclic tasks and 256 interrupt tasks to preserve deterministic execution during concurrent high-density interrupt processing. Built-in high-speed counter channels handle up to 100 kHz input signals across 4 differential or single-ended axes without introducing jitter to CPU scan execution. Dual pulse output channels generate up to 100 kHz pulse trains for high-precision, two-axis motion control. Function block structures support up to 128 definitions and 256 instances, allowing embedded Structured Text (ST) execution within standard ladder cycles.

Package Contents & Ordering Information

• 1x Omron CP1L-M60DT-D CPU Unit
• 1x Removable Terminal Block Assembly (Pre-installed)
• 1x Hardware Installation Sheet

Field Installation Guidelines

• Mounting Structure: Mount the CPU unit vertically onto a 35 mm DIN rail or fasten directly to a panel surface using M4 mounting screws. Maintain a minimum vertical gap of 50 mm above and below the module for airflow and wire trace routing.
• Power & Wiring: Terminate the 24 VDC system power lines at the dedicated DC power terminals using solid or stranded wiring rated between 0.5 mm2 and 1.25 mm2 (AWG 20 to AWG 16). Crimp insulated pin terminals to prevent shorting.
• Shielding & Grounding: Connect the protective earth (PE) terminal to a dedicated low-impedance ground point using wire with a minimum cross-sectional area of 2.0 mm2. Apply 360-deg braid shielding on high-speed pulse and counter signal cables.
• I/O Terminations: Ensure sinking transistor outputs operate within the maximum switching rating of 24 VDC at 0.3 A per point. Install external flyback suppression diodes across inductive DC loads.

Frequently Asked Questions

• What is the response frequency capability for the high-speed counter inputs?

  The unit supports 100 kHz response frequency across 4 distinct high-speed counter input axes.

• What is the minimum pulse width recognized by quick-response inputs?

  Quick-response inputs register digital pulses with a minimum pulse width of 50 us maximum.

• How many total I/O points can be controlled using expansion modules?

  The system expands up to 180 total I/O points by connecting up to 3 CP-series expansion units.

• What language formats are supported inside Function Block definitions?

  Function block definitions support standard Ladder Diagram and Structured Text (ST) coding formats.

• What are the output electrical characteristics on the CP1L-M60DT-D?

  This model features 24 sinking transistor outputs rated for DC loads with 100 kHz pulse train capability on 2 axes.

• What is the nominal operating power supply voltage for this unit?

  The module operates on a nominal 24 VDC power supply with a maximum power consumption of 20 W.

• How many interrupt input points operate in counter mode?

  There are 6 interrupt inputs operating in 16-bit up/down counter mode with a maximum response frequency of 5 kHz.

• How are user programs and DM area values preserved during power loss?

  User programs and setup parameters write to flash memory, while DM, Holding, and counter data retain state via battery backup.