Configured for non-volatile firmware and user-program image retention in ABB Advant Master S100 controller racks, the ABB DSMB144 57360001-EL (DSMB144 Memory Module) presents a 512 KB EPROM array to the PM510/PM630 or AC410/AC450 CPU across the 32-bit S100 backplane and CEX bus bridge.

Part Number and Sibling Variant Map

DSMB144 is the base type; 57360001-EL is the ABB order number, EXC57360001-EL the exchange refurb loop ID. The "-EL" suffix is not a hardware revision, it is the country/batch code for Sweden-origin boards. Do not cross-swap with DSMB114 (57360001-MG), DSMB116 (57360001-EB), DSMB127 (57360001-HG, battery RWM), or DSMB175 (57360001-KG) — same Eurocard edge, different decode PAL and socket count. The board ships as an empty 16-socket carrier; PROMs are not fitted.

Hardware Specifications

S100 Backplane Decode and EPROM Image Behavior

DSMB144 sits immediately right of the PM510/PM511/PM630 CPU or under the AC410/AC450 CPU daughter site. On 5 VDC power-up the CPU asserts chip-select lines mapped to the 16-socket 32 KB window; the first socket (U1) typically holds the boot strap, subsequent sockets hold firmware segments, PID/sequence libraries, and user control logic in contiguous or banked pages depending on the MasterTool build. Because the media is UV-EPROM, there is no electrical erase in rack — runtime writes from Advant Control Builder go to CPU RAM or DSMB127 RWM, never to DSMB144. Backplane bus communication velocity is static-decoded; the module exerts no handshake latency. Hot-swap is not permitted: S100 I/O cards allow live swap, DSMB144 does not — extracting under 5 VDC arcs the edge connector and can latch the CPU bus interface. Redundancy is handled at CPU level (AC450 dual CPU), not by mirroring two DSMB144 images live; the standby CPU holds its own DSMB144.

Ordering Info

• 1 x DSMB144 bare PCB 57360001-EL, 16 EPROM sockets empty
• 0 x 4911004-128 PROMs fitted (ordered separately)
• 1 x RoHS exemption sticker (Art 2(4))
• 2 x Eurocard ejector clips pre-fitted
• No screws, no ribbon, no UV window covers supplied

Slot Fitting and PROM Burn Rule

• Insert only into the CPU companion memory slot marked "MEM" on the S100 controller rack, never into DSAI/DSDI/DSAO I/O bays.
• Seat each 4911004-128 with notch to pin 1; reversed PROM burns the socket decode PAL on first access.
• Keep EPROM UV windows covered until after commissioning; shop fluorescent exposure beyond 5 min causes bit drift in unprogrammed cells.
• Full eject both levers before pull; partial seat leaves MEM LED dark and CPU halts at POST 0xMEM.
• Single-point bond S100 5 VDC logic ground to 24 VDC field ground at rack frame, do not daisy ground through DSMB144 buffers.

Frequently Asked Questions

Does DSMB144 store retentive process variables?

No. UV-EPROM is code-only, non-volatile, no battery. Retentive tags and setpoints live on DSMB127 battery-backed RWM or CPU internal RAM with supercap. Swapping DSMB144 never alters held values but loses the executable image if PROMs are not re-burned.

Can Control Builder download logic directly to DSMB144?

No. EPROM cannot be electrically written in situ. Project changes require pulling 4911004-128, UV erasing 15-20 min, burning on a 27C256 programmer, re-seating. Online download targets CPU RAM or flash card, not this board.

What POST result appears with empty sockets?

CPU halts at memory check, ERR LED on DSMB144 lit, AC450 shows 0xMEM stop code. Partial population is allowed only if the MasterTool image map is explicitly shortened and PROM count matches the chip-select range.

Is live swap possible on running AC450?

No. Unlike S100 I/O cards which support hot insertion in 10 s, DSMB144 is on the CPU local bus. Extracting under 5 VDC backplane power arcs the edge gold fingers and can destroy the CPU bus transceiver. Stop CPU, drop 5 VDC rail, then extract.

Why does a new board not boot the controller?

57360001-EL ships as bare carrier, 16 empty sockets. No PROM, no image. You must burn the AC410/AC450 firmware set plus user project PROMs offline. A bare board yields continuous ERR blink, not a partial boot.

Which PROM fits the 16 sockets?

32 KB UV-EPROM, ABB 4911004-128 (industry 27C256). 64 KB or 128 KB dies physically fit but decode stops at A14; upper half ignored. Mixing 16 KB dies forces bank misalignment and checksum fail.

Can DSMB144 replace DSMB127 in same slot?

Mechanically yes, electrically no. DSMB127 adds lithium-backed RWM for retentive data and smaller EPROM count. Substituting 144 for 127 forces full project reburn into EPROM and loses all battery-held variables unless migrated to CPU RWM first.

What is the 5 VDC backplane draw?

Typical 760 mA (3.8 W) with all 16 sockets populated and selected. Empty board draws ~210 mA for LED and buffer quiescence. This loads the DSSR122 5 VDC 40 A rail shared with PM630 and CEX bridge; keep CPU slot group under budget.