STMicroelectronics and NVIDIA Scale 800V HVDC Power Delivery for Next-Gen AI Data Centers
As AI workloads drive an unprecedented demand for compute density, the power requirements for modern data centers are escalating from traditional 15 kW racks to massive 600 kW and 1 MW configurations. To meet this challenge, STMicroelectronics and NVIDIA have expanded their collaboration to deploy advanced 800 V high-voltage direct current (HVDC) power distribution architectures. This transition is essential for minimizing current levels, reducing cable bulk, and significantly lowering energy transmission losses, ultimately enabling the extreme parallelism required by large-scale GPU-accelerated AI infrastructure.
The partnership has yielded a series of high-performance power delivery boards (PDBs) designed to fit within the constrained footprint of standard server racks. Among these, the new 6 kW 850 kHz LLC converter achieves a peak efficiency of 97.5% and a power density of 2,500 W/in³. This system leverages advanced 700 V GaN power transistors on the primary side to handle high-frequency operation while maintaining compact dimensions. Furthermore, the introduction of a 20 kW eight-level stacked LLC converter—utilizing 120 V GaN devices on the primary side and 25 V MOSFETs on the secondary—provides a targeted solution for powering intermediate rails that demand high current for GPUs, CPUs, and memory modules.
The technical architecture behind these solutions relies on a sophisticated blend of silicon carbide (SiC) and gallium nitride (GaN) technologies, integrated with STGAP galvanically isolated gate drivers. By utilizing an innovative topology that splits traditional large full-bridge designs into parallel sets of smaller transformers, the design team effectively reduced core magnetic flux and improved thermal management. This granular approach, combined with the STM32G4 microcontroller's high-resolution timers, allows for precise real-time control that is vital for maintaining stability in high-density power management systems.
Reliability and safety remain at the core of these HVDC architectures. The inclusion of ST’s BCD (BIPOLAR-CMOS-DMOS) process technology and specialized hot-swap protection circuits ensures that these systems can withstand the rigors of server-level deployments. As hyperscale data centers grapple with electromagnetic interference and heat dissipation, the ability to pack 12 kW of power delivery into a compact form factor with over 98% efficiency represents a critical leap forward in sustainable data center design. By significantly reducing the conversion steps between the AC grid and the server core, this transition to 800 V architecture helps organizations meet the massive energy demands of modern AI innovation while optimizing resource utilization.
With multiple PDB configurations—ranging from 6 kW to 20 kW—now moving into testing and production phases, the ST and NVIDIA partnership is defining the future of rack-scale power. This technological milestone not only addresses the immediate bottlenecks of massive power delivery but also provides a scalable blueprint for the industry. As companies continue to push the boundaries of AI hardware, these high-efficiency power distribution solutions will be instrumental in sustaining the performance and longevity of future hyperscale environments.
Written by: Elena Vance, a senior industry analyst with over 15 years of expertise in embedded systems and industrial power strategy. Elena focuses on the intersection of hardware infrastructure and energy efficiency, assisting global manufacturers in modernizing their digital estates for long-term operational resilience.