{"product_id":"abb-iimrm02-multibus-reset-module-bailey-infi-90-series","title":"ABB IIMRM02 Multibus Reset Module Bailey Infi 90 Series","description":"\u003cp\u003eThe\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003eABB IIMRM02\u003c\/strong\u003e, also cataloged as the\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003eIIMRM02\u003c\/strong\u003e\u003cspan\u003e \u003c\/span\u003eMultibus Reset Module, operates as a dedicated hardware component for hardware initialization, bus monitoring, and subsystem synchronization within Bailey Infi 90 Series platforms. This hardware card executes baseline reset sequences across peripheral multi-bus slots during power-up or fault clearing phases. It establishes predictable logical state boundaries for connected central processing architectures, memory arrays, and serial media interfaces, preventing command execution overlap or electrical state conflicts from degrading common internal data links.\u003c\/p\u003e\n\u003ch3\u003eEngineering Specification Matrix\u003c\/h3\u003e\n\u003ctable\u003e\n\u003cthead\u003e\n\u003ctr class=\"firstRow\"\u003e\n\u003ctd\u003e\u003cstrong\u003eParameter\u003c\/strong\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cstrong\u003eSpecification\u003c\/strong\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/thead\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eModel\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003eIIMRM02\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eSpare Part Number Reference\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e6642376A2\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eBrand\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003eABB (Bailey Infi 90)\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eOrigin\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003eSWEDEN\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eComponent Type\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003eMultibus Reset Module\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003ePrimary Line Voltage\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e240 V nominal\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eLine Frequency Boundaries\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e47 to 63 Hz\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eUpstream Circuit Breaker Size\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e20 A\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eDC Power Supply Load\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e+5 VDC at 20 A\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eIntegrated CPU RAM Capacity\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e96 Mbytes\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eFloppy Disk Drive Compatibility\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e1.44 Mbytes \/ 2.88 Mbytes\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eOperating Temperature Range\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e0 to +55 deg C\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eStorage Temperature Range\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e-40 to +85 deg C\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eOperating Humidity Limits\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e5 to 95 % RH non-condensing\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eNet Component Weight\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e0.1 kg\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eShipping Dimensions\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e20.3 x 2.5 x 33.0 cm\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003e\u003cspan\u003eTariff Code\u003c\/span\u003e\u003c\/td\u003e\n\u003ctd\u003e\u003cspan\u003e8537101190\u003c\/span\u003e\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003ch3\u003eBackplane Communications and System Density Alignment\u003c\/h3\u003e\n\u003cp\u003eThis auxiliary tracking board seats directly into standard slots to optimize backplane bus communication velocity across nearby computing nodes. By distributing precise hardware clearing signals through integrated traces, the card ensures high-density configurations recover cleanly from power interruptions without inducing cross-talk or timing propagation errors. The underlying microprocessor components maintain unified control over internal memory sectors during startup, verifying local firmware flash compatibility markers across shared processors before letting normal multi-drop bus communications resume.\u003c\/p\u003e\n\u003ch3\u003eTechnical Support FAQs\u003c\/h3\u003e\n\u003cp\u003eQ: What live-extraction hot-swap parameters apply to this reset module?\u003c\/p\u003e\n\u003cp\u003eA: Removing this module while the chassis is powered is not permitted. Extracting the card modifies local trace grounding impedance across the parallel logic tracks, disrupting backplane bus communication velocity and potentially triggering accidental hardware overrides on adjacent operational processor boards.\u003c\/p\u003e\n\u003cp\u003eQ: How does an overload on the +5 VDC power supply rail impact the onboard 96 Mbytes CPU RAM?\u003c\/p\u003e\n\u003cp\u003eA: The module demands stable +5 VDC rail delivery to support its memory sectors. An unexpected voltage sag on this line causes an immediate hardware watchdog trip, locking the 96 Mbytes RAM partition and placing the module in a fail-safe state to prevent incomplete data states from leaking into the system bus.\u003c\/p\u003e\n\u003cp\u003eQ: What operational precautions must be taken with the dual density floppy disk drive interface?\u003c\/p\u003e\n\u003cp\u003eA: The 1.44 Mbytes \/ 2.88 Mbytes media slot requires a dust-controlled environment to prevent read-head contamination. Media must remain seated during initialization loops; any manual extraction during an active read cycle disrupts internal memory formatting tasks and can abort initialization sequences.\u003c\/p\u003e\n\u003ch3\u003eField Assembly Guidelines\u003c\/h3\u003e\n\u003cul class=\"list-paddingleft-2\"\u003e\n\u003cli\u003e\n\u003cp\u003e\u003cstrong\u003eChassis Slot Alignment:\u003c\/strong\u003e\u003cspan\u003e \u003c\/span\u003eSlide the 0.1 kg module carefully into the designated enclosure guide rails. Push evenly until the rear pins seat firmly inside the mating backplane socket, then tighten the faceplate screws to secure the physical connection.\u003c\/p\u003e\n\u003c\/li\u003e\n\u003cli\u003e\n\u003cp\u003e\u003cstrong\u003eAC Input Power Protection:\u003c\/strong\u003e\u003cspan\u003e \u003c\/span\u003eEnsure the nominal 240 V supply lines are routed through an external 20 A circuit breaker as specified. The primary grounding lead must connect directly to the main copper technical earth bar of the cabinet to shield local logic circuits from grid surges.\u003c\/p\u003e\n\u003c\/li\u003e\n\u003cli\u003e\n\u003cp\u003e\u003cstrong\u003eElectrostatic Grounding Procedures:\u003c\/strong\u003e\u003cspan\u003e \u003c\/span\u003eTechnicians must secure a grounded ESD wrist strap to the bare metallic frame of the cabinet before adjustments are made to any board configuration jumpers or memory components.\u003c\/p\u003e\n\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003ch3\u003ePackaged Component Manifest\u003c\/h3\u003e\n\u003cul class=\"list-paddingleft-2\"\u003e\n\u003cli\u003e\n\u003cp\u003e1 x ABB Bailey Infi 90 IIMRM02 Multibus Reset Module Card (6642376A2)\u003c\/p\u003e\n\u003c\/li\u003e\n\u003cli\u003e\n\u003cp\u003e1 x Faceplate Fastener Retention Assembly Set\u003c\/p\u003e\n\u003c\/li\u003e\n\u003cli\u003e\n\u003cp\u003e1 x Bus Pin Configuration Schema Leaflet\u003c\/p\u003e\n\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003ch3\u003eLogistics and Dispatch Management\u003c\/h3\u003e\n\u003cp\u003eDelivery time: 2-7 days when payment finish protocols are completed and processed by our fulfillment division. Shipments are handled from our logistical center in Xiamen, China, and dispatched via international carrier networks including DHL, FEDEX, or UPS. The ultra-lightweight 0.1 kg component is enclosed in a thick, multi-layer anti-static industrial packaging wrap and cushioned within a heavy-walled exterior box lined with custom polyethylene shock inserts to guard the microelectronic board layout against static charges and vibrations during air freight transit.\u003c\/p\u003e","brand":"ABB","offers":[{"title":"Default Title","offer_id":46021145002157,"sku":"IIMRM02","price":88.0,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0733\/1613\/9181\/files\/IIMRM02_2.jpg?v=1779846571","url":"https:\/\/www.maxwellplc.com\/products\/abb-iimrm02-multibus-reset-module-bailey-infi-90-series","provider":"Maxwell PLC Ltd","version":"1.0","type":"link"}